The following disclosure relates to electrical circuits and signal processing.
In a magnetic recording system (e.g., a magnetic recording channel), data is typically written on or read from one or more data tracks of a magnetic storage medium such as a hard disk. The data tracks generally form concentric rings on the surface of the hard disk. When writing data onto a data track, a hard disk is rotated at a predetermined speed, and electrical signals applied to a magnetic read/write head floating over the data track are converted to magnetic transitions on the data track. The magnetic transitions can represent encoded digital data. For example, each transition (e.g., a rising edge or a falling edge) can correspond to a ONE bit value and the absence of a transition can correspond to a ZERO bit value, realizing a non return to zero inverted (NRZI) encoding of the data.
To obtain high density recording, magnetic transitions representing data bits are closely packed onto a magnetic storage medium. Such closely packed data bits may influence each other so that a non-linear magnetic shifting of transitions and bit interference may occur during recording. As a result, the reading of the high density recorded data bits may be adversely affected.
When writing data onto a high density magnetic recording medium, the position of transitions in a data stream can be adjusted (or precompensated) by a write precompensation circuit to correct for the influence of nearby transitions so that transitions in a recovered data stream are evenly placed.
Precompensation of data being recorded can include offsetting a magnetic transition shift. The offset of the magnetic transition shift of a bit due to the pattern of preceding and/or succeeding bits can be anticipated and the bit recording time changed to compensate for the magnetic transition shift due to the effects of surrounding bits.
A typical write precompensation circuit has plural interpolators, each providing a predetermined delay (or phase shift) of a write clock cycle for a magnetic transition shift according to a given data bit pattern. For example, in the recording of a data stream, one of the interpolators can be selected to provide a predetermined phase shift (early, nominal, or late) of a write clock cycle for recording a present data bit according to one or more data bit patterns surrounding the present data bit.
FIG. 1 shows a conventional interpolator 100 of a write precompensation circuit. Interpolator 100 includes a differential pair having a pair of differential inputs PH1, PH1Bar (complement of PH1), PH2, PH2 Bar (complement of PH2), and differential outputs OUT1, OUT1Bar (complement of OUT1). Interpolator 100 includes bias currents I1-I2, transistors M1-M4, and resistors R1-R2. In general, interpolator 100 provides a phase shift for a write clock cycle that is an interpolation between phase signals PH1 and PH2. Interpolator 100 provides the phase shift based on bias currents I1 and I2. For example, if bias current I1 is turned off, then interpolator 100 provides a phase shift that is substantially equal to that of phase signal PH2. And if bias currents I1 and I2 are substantially equal, then interpolator 100 provides a phase shift that is substantially in between those of phase signals PH1 and PH2.
As bias current I1 or I2 is changed, a common mode component of output signals OUT1 and OUT1Bar varies, and interpolator 100 therefore requires a certain amount of time to settle in order to output an accurate phase shift. The time to settle can be on the order of a few clock cycles. To avoid such delays due to settling, conventional write precompensation circuits typically require 2N interpolators, in which each interpolator provides a different phase shift for precompensation of a predetermined data pattern of N data bits. Accordingly, while four interpolators (for generating four different phase shifts) are needed to precompensate a corresponding (2) data bit pattern (e.g., [00], [01], [10] and [11]), the number of required interpolators increases as the data bit pattern is increased. For example, in a conventional write precompensation circuit, eight interpolators are needed to precompensate a (3) data bit pattern and sixteen interpolators are needed to precompensate a (4) data bit pattern. The increased number of interpolators to precompensate larger data bit patterns may add to the cost and complexity of a magnetic recording system.